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UNIX systems for modern architectures : symmetric multiprocesssing and caching for kernel programmers / Curt Schimmel.

By: Schimmel, Curt, 1959-Material type: TextTextLanguage: English Series: Addison-Wesley professional computing seriesPublication details: Reading, Mass. : Addison-Wesley, c1994. Description: xxiv, 396 p. : ill. ; 24 cmISBN: 0201633388 (recycled paper); 9780201633382Subject(s): Computer architectureDDC classification: 005.42 LOC classification: QA76.76.O63 | S3756 1994Online resources: Worldcat Details
Contents:
TOC Ch. 1. Review of UNIX Kernel Internals -- Pt. I. Cache Memory Systems. Ch. 2. Introduction to Cache Memory Systems. Ch. 3. Virtual Caches. Ch. 4. Virtual Caches with Keys. Ch. 5. Virtual Caches with Physical Address Tags. Ch. 6. Physical Caches. Ch. 7. Efficient Cache Management Techniques -- Pt. II. Multiprocessor Systems. Ch. 8. Introduction to Multiprocessor Systems. Ch. 9. Master-Slave Kernels. Ch. 10. Spin-Locked Kernels. Ch. 11. Semaphored Kernels. Ch. 12. Other MP Primitives. Ch. 13. Other Memory Models -- Pt. III. Multiprocessor Systems with Caches. Ch. 14. Introduction to MP Cache Consistency. Ch. 15. Hardware Cache Consistency -- Appendix A: Architecture Summary -- Appendix B: Answers to Selected Exercises.
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Holdings
Item type Current library Collection Call number Copy number Status Date due Barcode Item holds
Text Text Dr. S. R. Lasker Library, EWU
Reserve Section 		Non-fiction 005.42 SCW 1994 (Browse shelf(Opens below)) C-1 Not For Loan 6613
Text Text Dr. S. R. Lasker Library, EWU
Reserve Section 		Non-fiction 005.42 SCW 1994 (Browse shelf(Opens below)) C-2 Not For Loan 6706
Text Text Dr. S. R. Lasker Library, EWU
Circulation Section 		Non-fiction 005.4 2 SCW 1994 (Browse shelf(Opens below)) C-3 Available 6707
Total holds: 0

Online version:
Schimmel, Curt, 1959-
UNIX systems for modern architectures.
Reading, Mass. : Addison-Wesley, c1994
(OCoLC)68237426

Includes bibliographical references and index.

TOC Ch. 1. Review of UNIX Kernel Internals --
Pt. I. Cache Memory Systems. Ch. 2. Introduction to Cache Memory Systems. Ch. 3. Virtual Caches. Ch. 4. Virtual Caches with Keys. Ch. 5. Virtual Caches with Physical Address Tags. Ch. 6. Physical Caches. Ch. 7. Efficient Cache Management Techniques --
Pt. II. Multiprocessor Systems. Ch. 8. Introduction to Multiprocessor Systems. Ch. 9. Master-Slave Kernels. Ch. 10. Spin-Locked Kernels. Ch. 11. Semaphored Kernels. Ch. 12. Other MP Primitives. Ch. 13. Other Memory Models --
Pt. III. Multiprocessor Systems with Caches. Ch. 14. Introduction to MP Cache Consistency. Ch. 15. Hardware Cache Consistency --
Appendix A: Architecture Summary --
Appendix B: Answers to Selected Exercises.

CSE

Tahur Ahmed

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